hi-8382, hi-8383 the hi-8382 and hi-8383 bus interface products are silicon gate cmos devices designed as a line driver in accordance with the arinc 429 bus specifications. inputs are provided for clocking and synchronization. these signals are and'd with the data inputs to enhance system performance and allow the hi-8382 to be used in a variety of applications. both logic and synchronization inputs feature built-in 2,000v minimum esd input protection as well as ttl and cmos compatibility. the differential outputs of the hi-8382 are independently programmable to either the high speed or low speed arinc 429 output rise and fall time specifications through the use of two external capacitors. the output voltage swing is also adjustable by the application of an external voltage to the vref input. the hi-8382 has on-chip zener diodes in series with a fuse to each differential output protecting the arinc bus from an overvoltage failure. the outputs each have a series resistance of 37.5 ohms. the hi-8383 is identical to the hi- 8382 except that the series resistors are 13 ohms and the overvoltage protection circuitry has been eliminated. the updated hi-318x and hi-8585 arinc 429 line drivers are recommended for all new designs where logic signals must be converted to arinc 429 levels such as a user asic, the hi-3282 or hi-8282a arinc 429 serial transmitter/dual receiver, the hi-6010 arinc 429 transmitter/receiver or the hi-8783 arinc interface device. holt products are readily available for both industrial and military applications. please contact the holt sales department for additional information, including data sheets for any of the holt products . mentioned above pin configuration (top view) general description low power cmos ttl and cmos compatible inputs programmable output voltage swing adjustable arinc rise and fall times operates at data rates up to 100 kbits overvoltage protection industrial and military temperature ranges dscc smd part number features function arinc 429 differential line driver hi-8382 _ + truth table sync clock data(a) data(b) aout bout comments x l x x 0v 0v null l x x x 0v 0v null h h l l 0v 0v null h h l h -v +v low h h h l +v -v high h h h h 0v 0v null ref ref ref ref (see page 6 for additional package pin configurations) august 2006 arinc 429 differential line driver vref strobe sync data(a) ca aout -v gnd +v n/c bout cb data(b) clock v1 n/c 1 2 3 4 5 6 7 89 10 11 12 13 14 15 16 hi-8382c / ct / cm-01 / cm-03 smd # 5962-8687901ea 16 - pin ceramic side-brazed dip holt integrated circuits www.holtic.com (ds8382 rev. c) 08/06
functional description the sync and clock inputs establish data synchronization utilizing two and gates, one for each data input. each logic input, including the power enable ( ) input, are ttl/cmos compatible. besides reducing chip current drain, also floats each output. however the overvoltage fuses and diodes of the hi-8382 are not switched out. figure 1 illustrates a typical arinc 429 bus application. three power supplies are necessary to operate the hi-8382; typically +15v, -15v and +5v. the chip also works with 12v supplies. the +5v supply can also provide a reference voltage that determines the output voltage swing. the differential output voltage swing will equal 2v . if a value of v other than +5v is needed, a separate +5v power supply is required for pin v . with the data (a) input at a logic high and data (b) input at a logic low, a will switch to the +v rail and b will switch to the -v rail (arinc high state). with both data input signals at a logic low state, the outputs will both switch to 0v (arinc null state). the driver output impedance, r , is nominally 75 ohms. the rise and fall times of the outputs can be calibrated through the selection of two external capacitor values th re connected to the c and c input pins. typical values for high-speed operation (100kbps) are c = c = 75pf and for low-speed operation (12.5 to 14kbps) c = c = 500pf. strobe strobe ref ref out ref out ref out 1 ab ab ab at a the driver can be externally powered down by applying a logic high to the input pin. if this feature is not being used, the pin should be tied to ground. the c and c pins are inputs to unity gain amplifiers. therefore they must be allowed to swing to -5v. provision to strobe ab switch capacitors must be done with analog switches that allow voltages below their ground. the power supplies should be controlled to prevent large currents during supply turn-on and turn-off. the recom- mended sequence is +v followed by v , always ensuring that +v is the most positive supply. the -v supply is not critical and can be asserted at any time. both arinc outputs of the hi-8382 are protected by internal fuses capable of sinking between 800 - 900 ma for short periods of time (125s). power supply sequencing 1 figure 2. functional block diagram data (a) out data (b) inputs to arinc bus a out b ref v 1 v sync clock -v +v strobe gnd b a c c -15v +15v +5v hi-8382, hi-8383 figure 1. arinc 429 bus application ref b c gnd -v data (a) data (b) sync clock v 1 strobe a c v +v level shifter and slope control (b) level shifter and slope control (a) current regulator output driver (a) out b out a c l r l f a f b output driver (b) r/2 out r/2 out not included on hi-8383 over voltage clamps holt integrated circuits 2
symbol function description v power the reference voltage used to determine the output voltage swing input a logic high on this input places the driver in power down mode sync input synchronizes data inputs data (a) input data input terminal a c input connection for data (a) slew-rate capacitor a output arinc output terminal a -v power -12v to -15v gnd power 0.0v +v power +12v to +15v b output arinc output terminal b c input connection for data (b) slew-rate capacitor data (b) input data input terminal b clock input synchronizes data inputs v power +5v 5% ref a out out b 1 strobe absolute maximum ratings all voltages referenced to gnd, ta = operating temperature range (unless otherwise specified) pin descriptions parameter symbol conditions operating range maximum unit differential voltage v voltage between +v and -v terminals 40 v supply voltage +v +10.8 to +16.5 v -v -10.8 to -16.5 v v +5 5% +7 v voltage reference v for arinc 429 +5 5% 6 v for applications other than arinc 0 to 6 6 v input voltage range v gnd -0.3 v v1 +0.3 v output short-circuit duration see note: 1 output overvoltage protection see note: 2 operating temperature range t hi-temp & military -55 to +125 c industrial -40 to +85 c storage temperature range t ceramic & plastic -65 to +150 c lead temperature soldering, 10 seconds +275 c junction temperature t +175 c power dissipation p 16-pin ceramic dip see note: 3 1.725 w 28-pin ceramic lcc see note: 3 1.120 w 28-pin plastic plcc see note: 3 2.143 w 32-pin cerquad see note: 3 1.725 w thermal resistance, ? 16-pin ceramic dip 86.5 c/w (junction-to-ambient) 28-pin ceramic lcc 133.7 c/w 28-pin plastic plcc 70.0 c/w 32-pin cerquad 86.5 c/w note 1. heatsinking may be required for output short circuit at +125c and for 100kbps at +125c. note 2. the fuses used for output overvoltage protection may be blown by the presence of a voltage at either output that is greater than 12.0v with respect to gnd. (hi-8382 only) note 3. derate above +25c, 11.5mw/c for 16-pin dip and 32-pin cerquad, 7.5 mw/c for 28-pin lcc, 14.2 mw/c for 28-pin plcc dif 1 ref in a stg j d ja > < note: stresses above those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only. functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. hi-8382, hi-8383 holt integrated circuits 3
parameter symbol condition min typ max units supply current +v (operating) (+v) no load (0 - 100kbps) +11 ma supply current -v (operating) (-v) no load (0 - 100kbps) -11 ma supply current (operating) ( ) no load (0 - 100kbps) 500 a supply current (operating) ( ) no load (0 - 100kbps) 500 a supply current +v (power down) (+v) strobe = high 475 ua supply current -v (power down) (-v) strobe = high -475 ua supply current +v (during short circuit test) (+v) short to ground (see note: 1) 150 ma supply current -v (during short circuit test) (-v) short to ground (see note: 1) -150 ma output short circuit current (output high) short to ground =0 (see note: 2) -80 ma output short circuit current (output low) short to ground =0 (see note: 2) +80 ma input current (input high) 1.0 a input current (input low) -1.0 a input voltage high 2.0 v input voltage low 0.5 v output voltage high (output to ground) no load (0 -100kbps) +v +v v -. +. output voltage low (output to ground) no load (0 -100kbps) -v -v v -. +. output voltage null no load (0-100kbps) -250 +250 mv input capacitance 15 pf i i viv viv i i i i iv iv i i v v v v v c ccop ccop 1 ccop 1 ref ccop ref ccpd ccpd sc sc ohsc min olsc min ih il ih il oh 25 25 ol 25 25 null in see note 1 ref ref ref ref note 1. not tested, but characterized at initial device design and after major process and/or design change which affects this parameter. note 2. interchangeability of force and sense is acceptable. dc electrical characteristics ac electrical characteristics +v = +15v, -v = -15v, v = v = +5.0v, t = operating temperature range (unless otherwise specified). 1 ref a parameter symbol condition min typ max units rise time ( , ) = = 75pf see figure 3. 1.0 2.0 s fall time ( , ) = = 75pf see figure 3. 1.0 2.0 s propagtion delay input to output = = 75pf see figure 3. 3.0 s propagtion delay input to output = = 75pf see figure 3. 3.0 s ab t cc ab t cc tcc tcc out out r a b out out f a b plh a b phl a b figure 3. switching waveforms -9.5v to -10.5v +9.5v to +10.5v -4.75v to -5.25v 2.0v +4.75v to +5.25v 2.0v 0.5v 0.5v -4.75v to -5.25v +4.75v to +5.25v data (a) 0v data (b) 0v a out 0v b out 0v differential output 0v () ab out - out 50% 50% v ref adjust by c a t phl adjust by c a -v ref 50% 50% t plh t r +v ref -v ref adjust by c b adjust by c b t f 2v ref -2v re high null low note: outputs unloaded hi-8382, hi-8383 +v = +15v, -v = -15v, v = v = +5.0v, t = operating temperature range (unless otherwise specified). 1 ref a holt integrated circuits 4
ordering information hi-8382, hi-8383 notes: 1. all data taken on devices soldered to a single layer copper pcb (3" x 4.5" x .062"). 2. at 100% duty cycle, 15v power supplies. for 12v power supplies multiply all tabulated values by 0.8. 3. low speed: data rate = 12.5 kbps, load : r = 400 ohms ,c=30nf. 4. high speed: data rate = 100 kbps, load : r = 400 ohms ,c=10nf. data not presented fo rc=30nf as this is considered unrealistic for high speed operation. 5. similar results would be obtained with a shorted to b . 6. for applications requiring survival with continuous short circuit, operation above tj = 175c is not recommended. 7. data will vary depending on air flow and the method of heat sinking employed. in still air out out hi-8382 package thermal characteristics (1) only available in ?8382c? package. smd# 5962-8687901ea (2) gold terminal finish is pb-free, rohs compliant. a and b shorted to ground out out 5, 6, 7 1 2 package style arinc 429 supply current (ma) junction temp, tj (c) data rate 16 lead ceramic sb dip ta = 25c ta = 85c ta = 125c ta = 25c ta = 85c ta = 125c low speed 60.1 55.7 52.4 110 157 194 high speed 63.1 56.3 52.3 100 150 182 low speed 62.1 56.2 53.0 90 145 180 high speed 64.0 56.2 52.2 86 144 176 3 4 28 lead plcc maximum arinc load 7 1 2 package style arinc 429 supply current (ma) junction temp, tj (c) data rate 16 lead ceramic sb dip ta = 25c ta = 85c ta = 125c ta = 25c ta = 85c ta = 125c low speed 17.6 17.2 17.0 48 107 142 high speed 25.4 24.5 24.2 56 110 150 low speed 17.9 17.4 17.1 41 103 145 high speed 25.8 24.8 24.4 47 112 147 3 4 28 lead plcc package description temperature range 16 pin ceramic side brazed dip gold (?m? flow: solder) burn in -40c to +85c no -55c to +125c -55c to +125c -55c to +125c no yes yes t m dscc hi - (ceramic) 838xxx-xx part number t m-01 m-03 (1) blank part number c 28 pin ceramic leadless chip carrier gold (?m? flow: solder) 32 pin cerquad (not available with ?m? flow) solder s u flow i lead finish (2) 37.5 ohms yes 13 ohms no part number 8382 8383 output series resistance fuse holt integrated circuits 5
hi-8382, hi-8383 additional pin configurations (see page 1 for the 16-pin ceramic side-brazed dip package ) n/c n/c n/c n/c data(b) c n/c n/c b 4 3 2 1 28 27 26 12 13 14 15 16 17 18 5 6 7 8 9 10 25 24 23 22 21 20 19 clock n/c data (b) c n/c n/c b n/c data (a) n/c n/c c n/c a sync n/c v v n/c strobe ref 1 n/c a -v gnd +v b out out hi-8382s hi-8382st 56 789101112 30 31 32 1 2 3 20 19 18 17 16 15 n/c n/c +v gnd n/c -v clock v n/c v sync 1 ref strobe n/c n/c n/c data(a ) c n/c n/c a hi-8382u hi-8382ut 29 28 27 26 25 24 23 22 43212827 12 13 14 15 16 17 18 5 6 7 8 9 10 25 24 23 22 21 20 clock n/c data (b) c n/c n/c n/c b n/c data (a) n/c n/c c n/c a sync n/c v v n/c strobe ref 1 n/c a -v gnd +v b out out hi-8382j hi-8382jt 32-pin j-lead cerquad 28-pin ceramic lcc 28-pin plastic plcc (1) not recommended for new designs. the newer hi-3182pjxx and hi-3183pjxx are drop-in replacements for the older hi-8382jxx and hi-8383jxx respectively. the hi-318x parts are rated as moisture sensitive level 1 (msl 1) and do not require any special handling. the older hi-8382jxx and hi-8383jxx are rated as msl 3 and require dry-packaging and /or bake-out in accordance with ipc/jedec j-std-020a. lead finish part number 100% matte tin (pb-free, rohs compliant) f tin / lead (sn / pb) solder blank temperature range burn in -40c to +85c no -55c to +125c no t hi - (plastic) 838xj x x part number t blank flow i 37.5 ohms yes 13 ohms no package description 28 pin plastic j lead (1) 28 pin plastic j lead (1) part number 8382j 8383j output series resistance fuse holt integrated circuits 6
package type: package type: .125 min (3.175 min base plane seating plane .050 .005 (1.270 .127) .295 .010 (7.493 .254) pin 1 .200 max (5.080 max) .018 .002 (.457 .051) .100 bsc (2.540 bsc) .010 .002 (.254 .051) .035 .010 (.889 .254) .810 max (20.574 max) .300 .010 (7.620 .254) 16-pin ceramic side-brazed dip 16c .045 x 45 .453 .003 (11.506 .076) sq. .490 .005 (12.446 .127) sq. .045 x 45 see detail a .173 .008 (4.394 .203) pin no. 1 ident pin no. 1 .015 .002 (.381 .051) detail a .020 min (.508 min) .025 .045 28-pin plastic plcc .410 .020 (10.414 .508) .031 .005 (.787 .127) .017 .004 (.432 .102) .009 .050 .005 (1.27 .127) 28j r hi-8382 package dimensions inches (millimeters) holt integrated circuits 7
package type: package type: .451 .009 (11.455 .229) sq. .080 .020 (2.032 .508) .040 x 45 3pls (1.016 x 45 3pls) .050 .005 (1.270 .127) .025 .003 (.635 .076) .050 bsc (1.270 bsc) .008r .006 (.203r .152) .020 index (.508 index) pin 1 28s 28-pin ceramic leadless chip carrier .040 typ. (1.016) typ. .190 max. (4.826) max. .420 .012 (10.668 .305) .588 .008 (14.935 .203) .019 .003 (.483 .076) .050 typ. (1.270) typ. .488 .008 (12.395 .203) .450 .008 (11.430 .203) .550 .009 (13.970 .229) .520 .012 (13.208 .305) 31 32 1 2 .083 .009 (2.108 .229) 32-pin j-lead cerquad 32u pin 1 hi-8382 package dimensions inches (millimeters) holt integrated circuits 8
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